Progettazione analogica VLSI - (5 cfu)
|Prof. Andrea Boni||Tel. 0521-905815 - Fax. 0521-905822|
| ||E-mail. firstname.lastname@example.org|
| ||Home page. http://ee.unipr.it/~andrea/|
Analog integrated circuits design: main differences and peculiarities with respect to discrete-components design.
Passive components in Silicon technologies (resistors, capacitors and inductors): parasitics and lumped models. MOS transistors: main parasitic effects, minimization of the capacitance at the drain terminal; multi-gate devices.
Process tolerance and component mismatch. Interconnection lines: lumped models. Pad, packaging and bonding: models.
Impact of the process tolerance and mismatch on the analog design: corner analysis and Monte-Carlo simulation.
Behavioral modeling of analog cells with Spectre-HDL.
Design of operational amplifier in CMOS technology
Two-stages opamp: basic and advanced Miller compensation techniques. Analysis of non-dominant poles and zeros in the transfer function of basic amplifier stages: cascode and differential amplifier. Folded-cascode opamp. CMRR and PSRR of two-stages opamp.
High-DC gain opamps: gain boosting technique. Low supply voltage opamps, rail-to-rail input opamps. Output stages. Micro-power opamps.
Differential output opamps: common-mode feedback and stability issues. Simulation techniques.
Design of an analog circuit in CMOS technology (typically two-three student by group) using a high-level CAD framework (Cadence). Behavioral model and datasheet.
The exam is based on the completion of the assigned design (design report and cadence database should be provided to the Professor before accessing to the exam); oral discussion
B. Razavi, ``Design of Analog CMOS Integrated Circuits'', Mc Graw Hill
P. E. Allen, D. R. Holdberg , "CMOS Analog Circuit Design", 2nd edition, Oxford University Press
Ultimo aggiornamento: 15-07-2005